Benefits of using arrays of vertical nanowire FETs in integrated circuits to mitigate variability

We investigate the benefits of the use of arrays of vertical nanowire (vNW) field-effect transistors (FETs) to implement integrated circuits. By means of technology computer aided design and circuit simulations, the optimal dimensions of the vNWFETs are determined. Device and circuit variability lev...

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Bibliographic Details
Published in:Semiconductor science and technology 2021-12, Vol.36 (12), p.125017
Main Authors: del Moral, A, Amat, E, Bausells, J, Perez-Murano, F
Format: Article
Language:English
Subjects:
3D TCAD
gate-all-around devices
variability
vertical nanowire
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Summary:We investigate the benefits of the use of arrays of vertical nanowire (vNW) field-effect transistors (FETs) to implement integrated circuits. By means of technology computer aided design and circuit simulations, the optimal dimensions of the vNWFETs are determined. Device and circuit variability levels have been investigated. The benefits of using array configurations are the decrease of the response time and a significant mitigation of the variability level as the number of the elements in the array increases.
ISSN:0268-1242
1361-6641
DOI:10.1088/1361-6641/ac3371