Loading…
Design of a 240 GHz on-chip dual-polarization receiver for SIS mixer arrays
We report the design of a compact dual-polarization on-chip superconductor–insulator–superconductor receiver for array applications. The planar-circuit receiver chip is comprised of the entire radio frequency (RF) signal processing chain with three main circuit components alongside some auxiliary ci...
Saved in:
Published in: | Superconductor science & technology 2023-05, Vol.36 (5), p.55012 |
---|---|
Main Authors: | , , , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites |
Online Access: | Get full text |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Summary: | We report the design of a compact dual-polarization on-chip superconductor–insulator–superconductor receiver for array applications. The planar-circuit receiver chip is comprised of the entire radio frequency (RF) signal processing chain with three main circuit components alongside some auxiliary circuits: (1) a polarization splitting 4-probe orthomode transducer (OMT) that couples the RF and local oscillator signal from free space to the chip via a drilled feedhorn; (2) two hybrids that recombine the power of each polarization from the two sets of orthogonal OMT probes; and (3) twin-junction Nb/AlO
x
/Nb mixers that downconvert the recombined signals to the intermediate frequency. We ensure that the four side walls of each pixel are free from obscuration, using only the top and bottom of the pixel for various connections. Consequently, the design is extendable to a large format array. In this paper, we present the detailed design of the on-chip receiver, including extensive heterodyne simulations and its potential extension into a large format array. |
---|---|
ISSN: | 0953-2048 1361-6668 |
DOI: | 10.1088/1361-6668/acca51 |