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Effect of emitter-base spacer design on the performance of InP/GaAsSb/InP DHBTs grown by MOCVD
Effect of spacer layer design between InP emitter and GaAsSb base in InP/GaAsSb/InP double heterojunction bipolar transistors (DHBTs) grown by MOCVD was investigated. A very thin tensile-strained GaAs layer, or a thin GaInP layer, or combination of both was inserted between InP emitter and GaAsSb ba...
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Published in: | Physica scripta 2024-05, Vol.99 (5), p.55914 |
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Main Authors: | , , , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites |
Online Access: | Get full text |
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Summary: | Effect of spacer layer design between InP emitter and GaAsSb base in InP/GaAsSb/InP double heterojunction bipolar transistors (DHBTs) grown by MOCVD was investigated. A very thin tensile-strained GaAs layer, or a thin GaInP layer, or combination of both was inserted between InP emitter and GaAsSb base to mitigate Sb segregation and/or eliminate electron pile-up between emitter and base. With a base sheet resistances of ∼1800 ohm sq
−1
for all devices, DHBTs with a GaAs spacer, a GaInP spacer and the combination demonstrate a current gain of 24, 49 and 64, respectively. The conduct band discontinuity Δ
Ec
at InP/GaAsSb interfaces and the current blocking effect are effectively eliminated by employing the combination of GaAs and GaInP layers. |
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ISSN: | 0031-8949 1402-4896 |
DOI: | 10.1088/1402-4896/ad3509 |