Characterization of layout dependent thermal coupling in SOI CMOS current mirrors

A current mirror is proposed as a suitable structure for the characterization of layout dependent thermal coupling between MOSFETs. Using current and voltage measurements, and compensating for series resistance effects, very small changes in local device temperature can be made visible. For the firs...

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Bibliographic Details
Published in:IEEE transactions on electron devices 1996-12, Vol.43 (12), p.2227-2232
Main Authors: Tenbroek, B.M., Redman-White, W., Lee, M.S.L., Bunyan, R.J.T., Uren, M.J., Brunson, K.M.
Format: Article
Language:English
Subjects:
Circuit simulation
CMOS technology
Coupling circuits
Electrical resistance measurement
Mirrors
MOSFETs
Semiconductor device modeling
SPICE
Temperature
Voltage measurement
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Summary:A current mirror is proposed as a suitable structure for the characterization of layout dependent thermal coupling between MOSFETs. Using current and voltage measurements, and compensating for series resistance effects, very small changes in local device temperature can be made visible. For the first time it is demonstrated that thermal coupling can be observed in a 2 /spl mu/m SOI CMOS technology, with devices separated by as much as 20 /spl mu/m. Measurements were verified by electro-thermal SPICE simulations, using a simple lumped model to express thermal coupling. The observations reinforce the need for accurate circuit level models, including self heating and thermal coupling effects, for analogue applications in VLSI SOI CMOS technologies.
ISSN:0018-9383
1557-9646
DOI:10.1109/16.544395