Freeze-out characterization of radiation hardened N/sup +/ polysilicon gate CMOS transistors

Freeze-out behavior of radiation hardened N+ polysilicon gate CMOS devices is studied at liquid-nitrogen temperature before and after irradiation at different dose levels. Explanations are given for the threshold voltage variations and freeze-out effects both before and after irradiation. The degree...

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Bibliographic Details
Published in:IEEE transactions on nuclear science 1991-12, Vol.38 (6), p.1289-1296
Main Authors: Pantelakis, D.C., Hemmenway, D.F., van Vonno, N.W., Sanders, T.J.
Format: Article
Language:English
Subjects:
Circuits
CMOS process
CMOS technology
Cryogenics
Doping
Implants
Impurities
Radiation hardening
Temperature
Threshold voltage
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Summary:Freeze-out behavior of radiation hardened N+ polysilicon gate CMOS devices is studied at liquid-nitrogen temperature before and after irradiation at different dose levels. Explanations are given for the threshold voltage variations and freeze-out effects both before and after irradiation. The degree of freeze-out of the counterdope implant is controlled by temperature, applied gate potential, and applied body-to-source potential. Based on experimental results of this work, freeze-out is not significantly affected by irradiation doses, or the magnitude of the gate bias during radiation.< >
ISSN:0018-9499
1558-1578
DOI:10.1109/23.124107