Total dose characterization of a CMOS technology at high dose rates and temperatures

Radiation-hardened MOS ICs and transistors were irradiated using several high-dose-rate sources. A strong dependence of the dose-to-failure level is observed for different circuit designs, the dose per pulse, package temperature, and the average dose rate of the radiation source at ambient and eleva...

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Bibliographic Details
Published in:IEEE transactions on nuclear science 1988-12, Vol.35 (6), p.1557-1562
Main Authors: Browning, J.S., Connors, M.P., Freshman, C.L., Finney, G.A.
Format: Article
Language:English
Subjects:
Annealing
Circuit synthesis
CMOS integrated circuits
CMOS technology
Ionizing radiation
Laboratories
Linear particle accelerator
Temperature
Threshold voltage
Voltage measurement
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Summary:Radiation-hardened MOS ICs and transistors were irradiated using several high-dose-rate sources. A strong dependence of the dose-to-failure level is observed for different circuit designs, the dose per pulse, package temperature, and the average dose rate of the radiation source at ambient and elevated temperatures. The results indicate that extrapolating very high dose rate IC and transistor properties from Co-60 or X-ray source data could be extremely difficult and poses a serious problem for any hardness assurance program. For extrapolating to strategic applications, and intimate knowledge of the circuit design and performance and a knowledge of the transistor performance in the environment of interest are necessary.< >
ISSN:0018-9499
1558-1578
DOI:10.1109/23.25497