Development and analysis of an automated test system for the thermal characterization of IC packaging technologies

The development of an automated test system for the thermal characterization of IC packages is reported. A range of thermal test chips which have also been developed is described. The thermal test system is discussed in detail in terms of the temperature sensor calibration algorithm and the error bu...

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Bibliographic Details
Published in:IEEE transactions on components, hybrids, and manufacturing technology hybrids, and manufacturing technology, 1992-10, Vol.15 (5), p.615-624
Main Author: Mathuna, S.C.O.
Format: Article
Language:English
Subjects:
Applied sciences
Automatic testing
Calibration
Design. Technologies. Operation analysis. Testing
Electrical resistance measurement
Electronics
Engineering
Engineering, Electrical & Electronic
Engineering, Manufacturing
Exact sciences and technology
Integrated circuit packaging
Integrated circuit testing
Integrated circuits
Materials Science
Materials Science, Multidisciplinary
Ovens
Science & Technology
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
System testing
Technology
Temperature control
Temperature sensors
Thermal resistance
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Summary:The development of an automated test system for the thermal characterization of IC packages is reported. A range of thermal test chips which have also been developed is described. The thermal test system is discussed in detail in terms of the temperature sensor calibration algorithm and the error budget associated with junction-to-case thermal resistance measurements in an oven environment. A detailed discussion of the experimental errors and uncertainties is presented. A figure of +or-4% has been obtained for both the accuracy and repeatability of an oven-based junction-to-case thermal resistance test method. This is shown to compare favorably with the performance of a temperature controlled heat sink system. By comparison with infrared thermal imaging, the measurement of the average chip junction temperature is shown to provide an accurate thermal resistance figure for conventional IC package structures. IC packages used to demonstrate the application of the test system and test chips to thermal characterization include DIPs, PGAs, and chip carriers.< >
ISSN:0148-6411
1558-3082
DOI:10.1109/33.180023