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SITAR-an efficient 3-D simulator for optimization of nonplanar trench structures
A 3-D device simulator which allows the investigation of the electrical behavior of nonplanar trench-type device structures is presented. It has been used to analyze leakage due to punchthrough between neighboring trench capacitors, depending on geometry and doping profiles. Using an analytical mode...
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Published in: | IEEE transactions on computer-aided design of integrated circuits and systems 1990-11, Vol.9 (11), p.1184-1188 |
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container_end_page | 1188 |
container_issue | 11 |
container_start_page | 1184 |
container_title | IEEE transactions on computer-aided design of integrated circuits and systems |
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creator | Bergner, W. Kircher, R. |
description | A 3-D device simulator which allows the investigation of the electrical behavior of nonplanar trench-type device structures is presented. It has been used to analyze leakage due to punchthrough between neighboring trench capacitors, depending on geometry and doping profiles. Using an analytical model to estimate the leakage current and a completely vectorized solution algorithm for all three semiconductor equations, the program proved to be a very efficient tool for optimizing the cell size of 4- and 16-Mb DRAMs.< > |
doi_str_mv | 10.1109/43.62755 |
format | article |
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source | IEEE Xplore (Online service) |
subjects | Analytical models Applied sciences Capacitors Conductors Current density Doping profiles Electronics Equations Exact sciences and technology Finite difference methods Geometry Integrated circuits Integrated circuits by function (including memories and processors) Material storage Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Silicon |
title | SITAR-an efficient 3-D simulator for optimization of nonplanar trench structures |
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