Response surface methodology: a modeling tool for integrated circuit designers

An approach to design is described which allows the designer to statistically analyze a circuit's output characteristics. The results of this analysis give the designer the ability to reduce the sensitivity and to optimize these output characteristics with respect to process, package, and envir...

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Published in:IEEE journal of solid-state circuits 1989-04, Vol.24 (2), p.469-473
Main Authors: McDonald, J., Maini, R., Spangler, L., Weed, H.
Format: Article
Language:English
Subjects:
Circuit simulation
Equations
Input variables
Integrated circuit modeling
Mathematical model
Packaging
Polynomials
Power supplies
Response surface methodology
Temperature
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cited_by cdi_FETCH-LOGICAL-c272t-9926a04796fb02be887035cc4bab2de85208e907d01a396610909b58eecb615e3
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container_issue 2
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container_title IEEE journal of solid-state circuits
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creator McDonald, J.
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description An approach to design is described which allows the designer to statistically analyze a circuit's output characteristics. The results of this analysis give the designer the ability to reduce the sensitivity and to optimize these output characteristics with respect to process, package, and environmental variations. In addition, the authors demonstrate the means by which to establish output specifications before time and money are invested in fabricating devices in silicon. Finally, examples of the successful application of this technique to the design and development of an ECL (emitter-coupled logic) family are discussed. The methods for applying the results from this statistical technique to manufacturing and testing are also shown.< >
doi_str_mv 10.1109/4.18611
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ispartof IEEE journal of solid-state circuits, 1989-04, Vol.24 (2), p.469-473
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source IEEE Electronic Library (IEL) Journals
subjects Circuit simulation
Equations
Input variables
Integrated circuit modeling
Mathematical model
Packaging
Polynomials
Power supplies
Response surface methodology
Temperature
title Response surface methodology: a modeling tool for integrated circuit designers
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