Energy consumption modeling and optimization for SRAM's

The recent trends in portable computing technologies have established the need for energy efficient design strategies. To achieve minimum energy design goals, system designers need a technique to accurately model the energy consumption of their design alternatives without performing a full physical...

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Bibliographic Details
Published in:IEEE journal of solid-state circuits 1995-05, Vol.30 (5), p.571-579
Main Authors: Evans, R.J., Franzon, P.D.
Format: Article
Language:English
Subjects:
Application software
Applied sciences
Circuit simulation
Computational modeling
Computers
Design optimization
Design. Technologies. Operation analysis. Testing
Electronics
Energy consumption
Energy efficiency
Exact sciences and technology
Integrated circuits
Predictive models
Random access memory
Semiconductor device modeling
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
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Summary:The recent trends in portable computing technologies have established the need for energy efficient design strategies. To achieve minimum energy design goals, system designers need a technique to accurately model the energy consumption of their design alternatives without performing a full physical design and full-circuit simulation. This paper presents and compares five approaches for modeling the energy consumption of CMOS circuits. These five modeling approaches have been chosen to represent the various levels of model complexity and accuracy found in the current literature. These modeling approaches are applied to the energy consumption of SRAM's to provide examples of their use and to allow for the comparison of their modeling qualities. It was found that a mixed characterization model-using a CV/sup 2/ prediction for digital subsections and fitted simulation results for the analog subsections-is satisfactory (within /spl plusmn/1 process variation) for predicting the absolute energy consumed per cycle. This same model is also very good (within 2%) for predicting an optimum organization for the internal structures of the SRAM. Several common architectures and circuit designs for SRAM's are analyzed with these models. This analysis shows that global, rather than local improvements, produce the largest energy savings.< >
ISSN:0018-9200
1558-173X
DOI:10.1109/4.384170