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A monolithic 2-b delta-sigma A/D converter
A monolithic 20-b analog-to-digital (A/D) converter using oversampling techniques which is implemented in standard 3- mu m CMOS technology is described. The integrated circuit contains a fourth-order delta-sigma modulator and a digital finite-impulse-response filter and decimator. The modulator cons...
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Published in: | IEEE journal of solid-state circuits 1990-12, Vol.25 (6), p.1311-1317 |
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Main Authors: | , , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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Summary: | A monolithic 20-b analog-to-digital (A/D) converter using oversampling techniques which is implemented in standard 3- mu m CMOS technology is described. The integrated circuit contains a fourth-order delta-sigma modulator and a digital finite-impulse-response filter and decimator. The modulator consists of a continuous-time chopper-stabilized front end, and a switched-capacitor loop filter and comparator. The dynamic range is 123 dB over a DC-to-500-Hz bandwidth, and the signal-to-noise-harmonic-distortion ratio is 126 dB. The chip consumes 125 mW power and has an area of 29.25 mm/sup 2/.< > |
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ISSN: | 0018-9200 1558-173X |
DOI: | 10.1109/4.62174 |