Background memory area estimation for multidimensional signal processing systems

Memory cost is responsible for a large amount of the chip and/or board area of customized video and image processing system realizations. In this paper, we present a novel technique-founded on data-flow analysis which allows one to address the problem of background memory size evaluation for a given...

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Bibliographic Details
Published in:IEEE transactions on very large scale integration (VLSI) systems 1995-06, Vol.3 (2), p.157-172
Main Authors: Balasa, F., Catthoor, F., Hugo De Man
Format: Article
Language:English
Subjects:
Algorithm design and analysis
CMOS technology
Costs
Data analysis
Memory management
Multidimensional signal processing
Multidimensional systems
Scheduling
Signal analysis
Signal processing
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Summary:Memory cost is responsible for a large amount of the chip and/or board area of customized video and image processing system realizations. In this paper, we present a novel technique-founded on data-flow analysis which allows one to address the problem of background memory size evaluation for a given nonprocedural algorithm specification, operating on multidimensional signals with affine indexes. Most of the target applications are characterized by a huge number of signals, so a new polyhedral data-flow model operating on groups of scalar signals is proposed. These groups are obtained by a novel analytical partitioning technique, allowing to select a desired granularity, depending on the application complexity. The method incorporates a way to tradeoff memory size with computational and controller complexity.< >
ISSN:1063-8210
1557-9999
DOI:10.1109/92.386218