Compact GaN HEMT Power Amplifier MMIC Delivering Over 40 W for Ku-Band Applications

• Published in: IEEE access 2024, Vol.12, p.180415-180421
• Main Authors: Jang, Yeongmin, Choe, Wonseok, Kim, Minchul, Lee, Youngwan, Jeong, Jinho
• Format: Article
• Language: English
• Subjects: Density measurement; Electric potential; Gain; Gallium nitride; Gallium nitrides; GaN HEMT; High electron mobility transistors; High gain; High impedance; Impedance; Impedance matching; Inductors; Input impedance; Logic gates; MMIC (circuits); output power; power amplifier; Power amplifiers; power combining; power density; Power generation; Power system measurements; Semiconductor devices; Shunts (electrical); Silicon carbide; Silicon substrates; Transistors; Voltage
• ISSN: 2169-3536; 2169-3536
• DOI: 10.1109/ACCESS.2024.3508779

This paper presents the design and implementation of a high-power amplifier (HPA) using a 250-nm gallium nitride (GaN) high electron mobility transistor (HEMT) process on a silicon carbide substrate. The HPA is engineered to optimize both output power and power density relative to chip size. The 1st and 2nd drive stages utilize individual source via transistors (ISV TRs) for high gain and efficiency, while the output stage employs outside source via transistors (OSV TRs) to achieve high power density. The output matching network is initially designed for a unit TR with a high impedance transformation ratio of 114 and then expanded to a 16-way binary power combining circuit. RC stabilizers with shunt inductors are tailored in the input and interstage matching networks to address the very low input impedance of the drive stage TRs. These stabilizers effectively increase the input impedance of the TRs. The bias circuit is designed with a DC bus-bar structure, enhancing flexibility for large-scale power combining. The fabricated HPA demonstrated a maximum small-signal gain of 26.3 dB at 16.2 GHz and a 3-dB bandwidth ranging from 15.1 to 17.7 GHz. It also achieved an output power of 46.1 dBm (40.7 W) under pulsed operation from 16.0 to 16.75 GHz with a drain voltage of 28 V. When the drain voltage was increased to 32 V, it reached a maximum output power of 63 W at 16.5 GHz, demonstrating an excellent power density of 2.03 W/mm2 per chip area.