Eliminating Repetitive Short-Circuit Degradation and Failure of 1.2-kV SiC Power MOSFETs

Silicon carbide (SiC) power MOSFETs are known to degrade and eventually fail under repetitive short-circuit (SC) stress. In this article, a new approach, named Baliga Short-Circuit Improvement Concept (BaSIC) depletion-mode MOSFET (DMM), is demonstrated to prevent the degradation and failure of 1.2-...

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Bibliographic Details
Published in:IEEE journal of emerging and selected topics in power electronics 2021-12, Vol.9 (6), p.6773-6779
Main Authors: Kanale, Ajit, Baliga, B. Jayant
Format: Article
Language:English
Subjects:
Baliga Short-Circuit Improvement Concept (BaSIC) topology
Degradation
Depletion
depletion-mode MOSFET (DMM)
Failure
Logic gates
MOSFET
MOSFETs
power MOSFET
semiconductor device reliability
Short circuits
short-circuit (SC) currents
Silicon
Silicon carbide
Stress
Temperature measurement
Topology
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Summary:Silicon carbide (SiC) power MOSFETs are known to degrade and eventually fail under repetitive short-circuit (SC) stress. In this article, a new approach, named Baliga Short-Circuit Improvement Concept (BaSIC) depletion-mode MOSFET (DMM), is demonstrated to prevent the degradation and failure of 1.2-kV SiC power MOSFETs under repetitive SC stress. The new concept utilizes a low-voltage, gate-source-shorted Si DMM connected to the source of the SiC MOSFET. It was experimentally verified that no degradation or failure of the SiC power MOSFET occurs after over 3000 SC events with the BaSIC(DMM) topology while the SiC power MOSFETs degraded and failed after 200 SC events without it.
ISSN:2168-6777
2168-6785
DOI:10.1109/JESTPE.2020.3045117