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Analysis and Design of Tunable Amplifiers for Implantable Neural Recording Applications
In this paper, an in-depth design methodology for fully-integrated tunable low-noise amplifiers for neural recording applications is presented. In this methodology, a modified system design is proposed to optimize the area/noise/linearity performance. A novel linear pseudo-resistor with a wide range...
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Published in: | IEEE journal on emerging and selected topics in circuits and systems 2011-12, Vol.1 (4), p.546-556 |
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Main Authors: | , , , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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Summary: | In this paper, an in-depth design methodology for fully-integrated tunable low-noise amplifiers for neural recording applications is presented. In this methodology, a modified system design is proposed to optimize the area/noise/linearity performance. A novel linear pseudo-resistor with a wide range of tunability is also proposed. As a case study, a low-noise tunable and reconfigurable amplifier for neural recording applications is designed and simulated in a 0.18 \mu{\rm m} complementary metal-oxide-semiconductor process in all process corners. Simulated characteristics of the amplifier include tunable gain of 54 dB, tunable high-cutoff frequency of 10 kHz, programmable low-cutoff frequency ranging from 4 to 300 Hz, and power consumption of 20.8 \mu{\rm W} at 1.8 V. According to postlayout simulations, integrated input-referred noise of the amplifier is 2.6 \mu{\rm V}_{\rm rms} and 2.38 \mu{\rm V}_{\rm rms} over the 0.5 Hz-50 kHz frequency range for low-cutoff frequency of 4 and 300 Hz, respectively. The amplifier also provides output voltage swing of 1 {\rm V}_{\rm P-P} with total harmonic distortion of -46.24 dB at 300 Hz, and -45.97 dB at 10 kHz. |
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ISSN: | 2156-3357 2156-3365 |
DOI: | 10.1109/JETCAS.2011.2174492 |