A low-voltage BiMOS op amp

Describes the development of a threshold implanted BiMOS amplifier IC optimized for 2-5 V operation at a supply current of 300 /spl mu/A. A nonlinear operational transconductance amplifier (OTA) buffer having on-chip feedback provides a low-impedance rail-to-rail output, and a bulk-modulated PMOS in...

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Bibliographic Details
Published in:IEEE journal of solid-state circuits 1981-12, Vol.16 (6), p.661-668
Main Authors: Schade, O.H., Kramer, E.J.
Format: Article
Language:English
Subjects:
Analog integrated circuits
Broadband amplifiers
Integrated circuit noise
Inverters
Low-noise amplifiers
Operational amplifiers
Rail to rail amplifiers
Rail to rail outputs
Semiconductor optical amplifiers
Solid state circuits
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Summary:Describes the development of a threshold implanted BiMOS amplifier IC optimized for 2-5 V operation at a supply current of 300 /spl mu/A. A nonlinear operational transconductance amplifier (OTA) buffer having on-chip feedback provides a low-impedance rail-to-rail output, and a bulk-modulated PMOS input pair extends the common-mode range. Protective-network bootstrapping makes possible subpicoampere input-bias currents below 85/spl deg/C, and improved offset stability is achieved by the choice of threshold-level stage currents. Amplifier design is straightforward and readily applied from `micropower' to `broad-band' operating ranges. The combination of these features has produced a unique high-performance integrated circuit.
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.1981.1051659