XiSystem: a XiRisc-based SoC with reconfigurable IO module

In the nanometer era, the increase in nonrecurring engineering costs is a challenge for SoCs that can be faced through a standardization process. Hardware specialization of a standard platform to a given application can be achieved by exploiting reconfigurable technology. This paper presents a XiSys...

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Bibliographic Details
Published in:IEEE journal of solid-state circuits 2006-01, Vol.41 (1), p.85-96
Main Authors: Lodi, A., Cappelli, A., Bocchi, M., Mucci, C., Innocenti, M., De Bartolomeis, C., Ciccarelli, L., Giansante, R., Deledda, A., Campi, F., Toma, M., Guerrieri, R.
Format: Article
Language:English
Subjects:
Applied sciences
Circuit properties
Circuits
Communication standards
Computation
Computer applications
Costs
Data processing
Design. Technologies. Operation analysis. Testing
Devices
Digital circuits
DSP
Electric, optical and optoelectronic circuits
Electronic circuits
Electronics
Energy consumption
Exact sciences and technology
Field programmable gate arrays
FPGA
Hardware
Input-output equipment
Integrated circuits
Integrated circuits by function (including memories and processors)
Microprocessors
Platforms
Protocols
reconfigurable processor
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Silicon
SoC
Standardization
Time to market
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Summary:In the nanometer era, the increase in nonrecurring engineering costs is a challenge for SoCs that can be faced through a standardization process. Hardware specialization of a standard platform to a given application can be achieved by exploiting reconfigurable technology. This paper presents a XiSystem SoC, which integrates two different field-programmable devices to provide application-specific computing blocks and IOs. A XiRisc reconfigurable processor is exploited to achieve more than one order of magnitude speed-up and energy consumption reduction vis-a/spl grave/-vis a DSP-like processor, while an eFPGA is integrated in the system in order to make it flexible enough to support various IO ports and protocols. The reconfigurable IO device is also utilized for pre/post data processing and implementation of some standard computational blocks.
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2005.859319