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A 1.08-nW/kHz 13.2-ppm/°C Self-Biased Timer Using Temperature-Insensitive Resistive Current

This paper proposes a 32.7 kHz self-biased wake-up timer using temperature-insensitive resistive current. A dual-loop structure with supply-regulation loop and frequency-locked loop determines the regulated voltages at both ends of a temperature-compensated resistor and cancels out the amplifier off...

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Bibliographic Details
Published in:IEEE journal of solid-state circuits 2018-08, Vol.53 (8), p.2311-2318
Main Authors: Jung, Jaehong, Kim, Ik-Hwan, Kim, Seong-Jin, Lee, Yoonmyung, Chun, Jung-Hoon
Format: Article
Language:English
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Summary:This paper proposes a 32.7 kHz self-biased wake-up timer using temperature-insensitive resistive current. A dual-loop structure with supply-regulation loop and frequency-locked loop determines the regulated voltages at both ends of a temperature-compensated resistor and cancels out the amplifier offset voltages, thus generating temperature-insensitive resistive current for the switched capacitor. Moreover, a self-biasing scheme in low-power design reduces the power variation across the temperature range and eliminates the necessity of a sub- \mu \text{A} reference current generator. The proposed timer with its start-up circuit generates
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2018.2824307