A DC-to-108-GHz CMOS SOI Distributed Power Amplifier and Modulator Driver Leveraging Multi-Drive Complementary Stacked Cells

This article proposes a complementary distributed power amplifier (DPA) using stacked gain cells with multiple input driving signals. The stack multi-drive compensates for the increasing input transmission line (TL) and stack losses as frequency increases and results in bandwidth (BW) extension with...

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Bibliographic Details
Published in:IEEE journal of solid-state circuits 2019-12, Vol.54 (12), p.3437-3451
Main Authors: El-Aassar, Omar, Rebeiz, Gabriel M.
Format: Article
Language:English
Subjects:
Amplification
Bandwidths
Broadband
Broadband communication
Capacitance
CMOS
CMOS SOI
Couplings
Electric power distribution
Gain
gain–bandwidth product (GBW)
Impedance
Linearity
Mach–Zehnder modulator (MZM)
millimeter-waves
Modulation
modulator driver
MOS devices
multi-drive
Power amplifiers
Pulse amplitude modulation
stacked amplifier
transformer
Transmission lines
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Summary:This article proposes a complementary distributed power amplifier (DPA) using stacked gain cells with multiple input driving signals. The stack multi-drive compensates for the increasing input transmission line (TL) and stack losses as frequency increases and results in bandwidth (BW) extension with a flat gain response. The technique simultaneously increases the gain-BW (GBW) product and the output power at high frequencies while maintaining a smaller chip area compared with the conventional DPA design. A broadband active splitter is introduced before the output stage to create two complementary distributed paths which are exploited for AM-AM and AM-PM non-linearity compensation. The CMOS DPA is implemented in 45-nm RFSOI with a core area of 0.31 mm 2 . The amplifier has a 23-dB gain and 108-GHz 3-dB BW from true-dc frequency with no need for external bias tees. The DPA maintains a P1 dB and PSAT over 16.9 and 18.4 dBm, respectively, from dc-to-70 GHz, with a 70-GHz PSAT 3-dB BW. When operated with modulated signals, the DPA provides over 100 Gb/s in both 64-QAM and PAM-4 modulations. To the best of our knowledge, the CMOS DPA reports the highest GBW (1.525 THz), the highest data rate in 64-QAM for carriers up to 59 GHz, and the highest single-ended output swing in PAM-4 modulation.
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2019.2941013