Capacitive Silicon Modulator Design With V-Shaped SiO Gate Waveguide to Optimize V\times L and Bandwidth Trade-Off

This work presents a capacitive modulator design and modeling of a new waveguide architecture using silicon and poly-si technologies. We use a methodology involving the entire lumped-type modulator design process, from the optical design to the small-signal RF analysis. By means of geometric and phy...

Full description

Saved in:
Bibliographic Details
Published in:IEEE journal of selected topics in quantum electronics 2020-03, Vol.26 (2), p.1-8
Main Authors: Dourado, Diego M., de Farias, Giovanni B., Bustamante, Yesica R. R., de L. Rocha, Monica, Carmo, J. P.
Format: Article
Language:English
Subjects:
Bandwidth
Capacitive modulator
figure of merit
Logic gates
lumped-type modulator
mach-zehnder
optical devices
Optical losses
Optical modulation
Optical waveguides
Silicon
silicon photonics
trade-off analysis
V-shaped oxide gate modulators
Citations: Items that this one cites
Items that cite this one
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:This work presents a capacitive modulator design and modeling of a new waveguide architecture using silicon and poly-si technologies. We use a methodology involving the entire lumped-type modulator design process, from the optical design to the small-signal RF analysis. By means of geometric and physical parameters adjustments, the trade-offs among several figures of merit are analyzed in this paper. Due to the waveguide configuration, it is shown that the modulator can improve the tradeoff between V π and bandwidth compared to the state-of-the-art for this kind of device. For instance, the best combinations are V π ≏1V @ 20.4 GHz and V π = 5.7V @ ~31 GHz, with equivalent optical losses of 3 dB and 1.1 dB, respectively.
ISSN:1077-260X
1558-4542
DOI:10.1109/JSTQE.2019.2949464