Stochastic Matching Properties of FinFETs

For the first time, an experimental assessment of the intradie mismatch properties of a FinFET technology is presented. By applying the analysis to different combinations of gate stack materials, it is shown that the best results are obtained with undoped fins, with matching performances on par or e...

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Bibliographic Details
Published in:IEEE electron device letters 2006-10, Vol.27 (10), p.846-848
Main Authors: Gustin, C., Mercha, A., Loo, J., Subramanian, V., Parvais, B., Dehan, M., Decoutere, S.
Format: Article
Language:English
Subjects:
Applied sciences
Assessments
Degradation
Device mismatch
Devices
Doping
double gate
Electronics
Exact sciences and technology
FinFET
FinFETs
Fins
Fluctuations
Gates
Geometry
intrinsic parameter fluctuation
Matching
Microelectronics
MOSFETs
Roughness
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
series resistance
Stacks
Stochastic processes
Threshold voltage
Tin
Transistors
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Summary:For the first time, an experimental assessment of the intradie mismatch properties of a FinFET technology is presented. By applying the analysis to different combinations of gate stack materials, it is shown that the best results are obtained with undoped fins, with matching performances on par or even superior to those of planar MOSFETs. Furthermore, the observation in the narrowest transistors of a noticeable degradation of the mismatch in both the threshold voltage and current factor points to line-edge roughness effects as the presumed key factor influencing intradie mismatch in the smallest fin geometries
ISSN:0741-3106
1558-0563
DOI:10.1109/LED.2006.882524