Gate-First High-Performance Germanium nMOSFET and pMOSFET Using Low Thermal Budget Ion Implantation After Germanidation Technique

The fabrication of high-performance Ge nMOSFET and pMOSFET by using the ion implantation after germanidation (IAG) technique is demonstrated. TaN/Al 2 O 3 /GeO 2 is deposited as a common gate stack for the low-temperature gatefirst process. Both Ge nMOSFET and pMOSFET exhibited a high I ON /I OFF ra...

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Bibliographic Details
Published in:IEEE electron device letters 2016-03, Vol.37 (3), p.253-256
Main Authors: Wen-Hsin Chang, Ota, Hiroyuki, Maeda, Tatsuro
Format: Article
Language:English
Subjects:
Annealing
CMOS process
Germanium
Ion implantation
Logic gates
MOSFET
MOSFET circuits
MOSFETs
parasitic resistance
Performance evaluation
Resistance
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Summary:The fabrication of high-performance Ge nMOSFET and pMOSFET by using the ion implantation after germanidation (IAG) technique is demonstrated. TaN/Al 2 O 3 /GeO 2 is deposited as a common gate stack for the low-temperature gatefirst process. Both Ge nMOSFET and pMOSFET exhibited a high I ON /I OFF ratio of >10 4 (I s ), a reasonable subthreshold swing of approximately 100 mV/decade, and a low parasitic resistance
ISSN:0741-3106
1558-0563
DOI:10.1109/LED.2016.2523518