Analysis on Reverse Drain-Induced Barrier Lowering and Negative Differential Resistance of Ferroelectric-Gate Field-Effect Transistor Memory

We demonstrate novel analysis on electrical characteristics of ferroelectric-gate field effect transistor (FeFET), especially reverse DIBL (RDIBL) and negative differential resistance (NDR) phenomena through measurements of fabricated FeFETs and technology computer-aided design (TCAD) simulations. T...

Full description

Saved in:
Bibliographic Details
Published in:IEEE electron device letters 2020-08, Vol.41 (8), p.1197-1200
Main Authors: Lee, Kitae, Kim, Sihyun, Lee, Jong-Ho, Kwon, Daewoong, Park, Byung-Gook
Format: Article
Language:English
Subjects:
CAD
Capacitors
Computer aided design
Computer simulation
Conduction bands
Current measurement
ferroelectric FET
Ferroelectric materials
Ferroelectricity
Field effect transistors
Floating bodies
Hafnium zirconium oxide
Immune system
Logic gates
negative differential resistance
reverse DIBL
Semiconductor devices
Tin
Transistors
Voltage measurement
Citations: Items that this one cites
Items that cite this one
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:We demonstrate novel analysis on electrical characteristics of ferroelectric-gate field effect transistor (FeFET), especially reverse DIBL (RDIBL) and negative differential resistance (NDR) phenomena through measurements of fabricated FeFETs and technology computer-aided design (TCAD) simulations. The FeFETs are embodied by extracting the ferroelectric properties using metal-ferroelectric-metal (MFM) capacitors and applying it to the gate stack of n-type FeFETs. Then, the device and the model parameters of the FeFETs are calibrated by matching TCAD simulation results to measured electrical characteristics. By the TCAD simulations which reflect the Preisach model considering multi-domain ferroelectric characteristics, it is revealed that RDIBL and NDR result from the local conduction band energy rising at the drain-side with drain voltage increasing. Furthermore, it is found that gate-induced drain leakage (GIDL) accelerates RDIBL with the help of the injection of the generated holes by GIDL in the floating body of FeFETs.
ISSN:0741-3106
1558-0563
DOI:10.1109/LED.2020.3000766