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Sensor Signal Processing Using High-Level Synthesis With a Layered Architecture

This letter describes a newly established design framework with the layered architecture of processing elements (PEs) exploiting high-level synthesis and its evaluation results. The design framework was developed for intelligent sensor nodes of Internet of Things applications that collaborate with c...

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Bibliographic Details
Published in:IEEE embedded systems letters 2018-12, Vol.10 (4), p.119-122
Main Authors: Hihara, Hiroki, Iwasaki, Akira, Hashimoto, Masanori, Ochi, Hiroyuki, Mitsuyama, Yukio, Onodera, Hidetoshi, Kanbara, Hiroyuki, Wakabayashi, Kazutoshi, Sugibayashi, Tadahiko, Takenaka, Takashi, Hada, Hiromitsu, Tada, Munehiro, Miyamura, Makoto, Sakamoto, Toshitsugu
Format: Article
Language:English
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Summary:This letter describes a newly established design framework with the layered architecture of processing elements (PEs) exploiting high-level synthesis and its evaluation results. The design framework was developed for intelligent sensor nodes of Internet of Things applications that collaborate with cloud systems, in which small footprint and low power consumption were major concerns. The design framework consists of four layered structure of PE architecture with the extended database management function of a high-level synthesis tool. We investigated the dependencies of resource consumption on the granularity of coarse grained function definitions using the extended database management function of CyberWorkBench. The evaluation results showed that small footprint was achieved especially with dynamically reconfigurable technique.
ISSN:1943-0663
1943-0671
DOI:10.1109/LES.2018.2797064