Dependence of Voltage and Size on Write Error Rates in Spin-Transfer Torque Magnetic Random-Access Memory

The dependence of the write-error rate (WER) on the applied write voltage, write pulse width, and device size was examined in individual devices of a spin-transfer torque (STT) magnetic random-access memory (MRAM) 4 kbit chip. We present 10 ns switching data at the 10 -6 error level for 655 devices,...

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Bibliographic Details
Published in:IEEE magnetics letters 2016, Vol.7, p.1-4
Main Authors: Nowak, Janusz J., Robertazzi, Ray P., Sun, Jonathan Z., Hu, Guohan, Park, Jeong-Heon, Lee, JungHyuk, Annunziata, Anthony J., Lauer, Gen P., Kothandaraman, Raman, O'Sullivan, Eugene J., Trouilloud, Philip L., Kim, Younghyun, Worledge, Daniel C.
Format: Article
Language:English
Subjects:
Devices
Electric potential
Errors
Floors
Junctions
Magnetic tunneling
Magnetoresistive random access memory
Performance evaluation
Perpendicular magnetic anisotropy
Scanning electron microscopy
Spin Electronics
Spin Transfer Torque Magnetic Random Access Memory
Switches
Switching
Torque
Tunnel junctions
Voltage
Write Error Rates
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Summary:The dependence of the write-error rate (WER) on the applied write voltage, write pulse width, and device size was examined in individual devices of a spin-transfer torque (STT) magnetic random-access memory (MRAM) 4 kbit chip. We present 10 ns switching data at the 10 -6 error level for 655 devices, ranging in diameter from 50 nm to 11 nm, to make a statistically significant demonstration that a specific magnetic tunnel junction stack with perpendicular magnetic anisotropy is capable of delivering good write performance in junction diameters range from 50 to 11 nm. Furthermore, write-error-rate data on one 11 nm device down to an error rate of 7×10 -10 was demonstrated at 10 ns with a write current of 7.5 μA, corresponding to a record low switching energy below 100 fJ.
ISSN:1949-307X
1949-3088
DOI:10.1109/LMAG.2016.2539256