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How Lithography and Metrology Are Enabling Yield in the Next Generation of Semiconductor Patterning
This article highlights the state of the art and critical challenges with lithography and patterning in metrology in enabling yield in next-generation high-volume manufacturing of semiconductors. Each of these technology sectors are presented with respect to the 2023 International Roadmap for Device...
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Published in: | Computer (Long Beach, Calif.) Calif.), 2024-01, Vol.57 (1), p.51-58 |
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Main Authors: | , , , , , , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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Summary: | This article highlights the state of the art and critical challenges with lithography and patterning in metrology in enabling yield in next-generation high-volume manufacturing of semiconductors. Each of these technology sectors are presented with respect to the 2023 International Roadmap for Devices and Systems, available freely at https://irds.ieee.org. |
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ISSN: | 0018-9162 1558-0814 |
DOI: | 10.1109/MC.2023.3312767 |