A Design of a 15-GHz, Voltage-Controlled Ring Oscillator in 130-nm CMOS Technology: Optimizing Central Frequency and Power Dissipation

• Published in: IEEE industrial electronics magazine 2021-03, Vol.15 (1), p.58-66
• Main Authors: taghizadeh, fatemeh, Abouei, jamshid, Ghafoorzadeh-Yazdi, Ali
• Format: Magazinearticle
• Language: English
• Subjects: Circuit design; Clock recovery; CMOS; CMOS technology; Communications systems; Computer architecture; Delays; Design optimization; Inverters; Microprocessors; Phase noise; Ring oscillators; Shutdowns; Signal generation; Transistors; Voltage controlled oscillators
• ISSN: 1932-4529; 1941-0115
• DOI: 10.1109/MIE.2020.3002517

The voltage-controlled oscillator (VCO) is a critical block in the electronic and communication systems. It may be applied in frequency synthesis, clock signal generation, and a clock recovery circuit. In this article, the authors present the design and performance analysis of a 15-GHz, voltage-controlled ring oscillator using the 130-nm CMOS technology that operates in a 1.8-voltage power supply for high-speed applications. The designed scheme is a fivestage ring oscillator, which includes one inverter replaced by the NAND gate to shut down the ring oscillator during inactive mode. For improving the efficiency of the ring oscillator in the transceiver, different techniques such as transistor sizing are employed. In comparison to other publications, the authors' ring oscillator design is optimized with reference to the central frequency and power dissipation.