A Physical-Location-Aware X-Filling Method for IR-Drop Reduction in At-Speed Scan Test

The IR-drop problem during test mode exacerbates delay defects and results in false failures. In this paper, we take the X-filling approach to reduce the IR-drop effect during an at-speed test. The main difference between our approach and the previous X-filling approaches lies in two aspects. The fi...

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Bibliographic Details
Published in:IEEE transactions on computer-aided design of integrated circuits and systems 2010-02, Vol.29 (2), p.289-298
Main Authors: Hsieh, Wen-Wen, Chen, Shih-Liang, Lin, I-Sheng, Hwang, TingTing
Format: Article
Language:English
Subjects:
Application specific integrated circuits
At-speed scan test
Automatic test pattern generation
Automatic testing
Chip scale packaging
Circuit testing
Computer aided design
Defects
Delay
Design engineering
Fabrication
Failure
Integrated circuit yield
Integrated circuits
IR-drop
Iridium
physical location aware
Reduction
Test pattern generators
Timing
X-filling
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Description
Summary:The IR-drop problem during test mode exacerbates delay defects and results in false failures. In this paper, we take the X-filling approach to reduce the IR-drop effect during an at-speed test. The main difference between our approach and the previous X-filling approaches lies in two aspects. The first one is that we take the spatial information into consideration in our approach. The second one is how X-filling is performed. We propose a backward-propagation technique instead of a forward-propagation approach taken in previous work. The experimental results show that our approach can reduce 21.1% of the maximum IR-drop in the best case and 9.1% on the average as compared to previous work.
ISSN:0278-0070
1937-4151
DOI:10.1109/TCAD.2009.2035584