A Multichiplet Computing-in-Memory Architecture Exploration Framework Based on Various CIM Devices

• Published in: IEEE transactions on computer-aided design of integrated circuits and systems 2024-12, Vol.43 (12), p.4613-4625
• Main Authors: Dai, Zhuoyu, Xiang, Feibin, Fu, Xiangqu, He, Yifan, Sun, Wenyu, Liu, Yongpan, Yang, Guanhua, Zhang, Feng, Yue, Jinshan, Li, Ling
• Format: Article
• Language: English
• Subjects: 3-D integration; Artificial intelligence; artificial intelligence (AI) application; chiplet; Computer architecture; computing-in-memory (CIM); design space exploration; Energy efficiency; In-memory computing; Integrated circuits; Performance evaluation; Random access memory
• ISSN: 0278-0070; 1937-4151
• DOI: 10.1109/TCAD.2024.3416256

Computing-in-memory (CIM) architectures based on various devices, such as resistive random access memory, SRAM, DRAM, etc., have demonstrated promising energy efficiency. Single-device-based CIM chips show different advantages on performance, power, or area metrics under different workload/operators sizes and application requirements. Some nonidealities, such as the write endurance of some nonvolatile devices, also influence the design choices. Motivated by the emerging 2.5-D/3-D chiplet integration, this work aims to combine the advantages of CIM/storage chips based on different devices, and proposes a design exploration framework to combine the advantages of CIM chips based on these devices in a 3-D-stack architecture. This work proposes: 1) an evaluation method for the power, performance, and area metrics of the multichiplet CIM architecture; 2) an abstraction for the single-device-based CIM chiplets and artificial intelligence algorithm operators; and 3) a mapping and optimization strategy to explore the 2.5-D/3-D CIM chiplet set. The effectiveness of the mapping strategy is verified with a small-scale brute-force search. The proposed design exploration framework can help to find a better-multichiplet CIM architecture. Under a simple design case, the proposed 3-D CIM architecture shows 4.68\times - 53.32\times energy efficiency compared with the single CIM chip baselines. The abstracted chiplet library is open-source available in the open-source https://github.com/dai0dai/3D_CIM_Chiplet_Architecture_Exploration .