Noise Analysis and Minimization in Bang-Bang Digital PLLs

In digital bang-bang phase-locked loops (BBPLLs), both the hard nonlinearity of the phase detector and the frequency granularity of the digitally controlled oscillator (DCO) can give rise to undesired tones or peaking in the output spectrum. This work derives the maximum ratio between DCO resolution...

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Bibliographic Details
Published in:IEEE transactions on circuits and systems. II, Express briefs Express briefs, 2009-11, Vol.56 (11), p.835-839
Main Authors: Zanuso, M., Tasca, D., Levantino, S., Donadel, A., Samori, C., Lacaita, A.L.
Format: Article
Language:English
Subjects:
Bang-bang control
binary phase detectors (PDs)
Circuits
clock and data recovery (CDR) circuits
Delay
Digital
Digital control
digital phase-locked loop (PLL)
Exact solutions
frequency synthesis
Jitter
Limit-cycles
Mathematical analysis
Noise
nonlinear phase detector
Optimization
Oscillators
Phase detection
Phase frequency detector
Phase locked loops
Quantization
Signal to noise ratio
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Summary:In digital bang-bang phase-locked loops (BBPLLs), both the hard nonlinearity of the phase detector and the frequency granularity of the digitally controlled oscillator (DCO) can give rise to undesired tones or peaking in the output spectrum. This work derives the maximum ratio between DCO resolution and jitter, which avoids limit cycles, in the case of dominant DCO noise over reference noise. Moreover, the output jitter is expressed in closed form as a function of the loop parameters and latency, revealing the existence of a minimum and suggesting an optimum design criterion. Finally, an estimation of the BBPLL output spectrum taking into account the quantization noise is provided.
ISSN:1549-7747
1558-3791
DOI:10.1109/TCSII.2009.2032470