A Time-to-Digital Converter Based on a Multiphase Reference Clock and a Binary Counter With a Novel Sampling Error Corrector

A new type of sampling error corrector for a time- to-digital converter (TDC) having a multiphase reference clock and a binary counter is demonstrated. With this corrector, sampling errors caused by asynchronous TDC inputs are corrected without requiring additional counters or reclocking circuits. A...

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Bibliographic Details
Published in:IEEE transactions on circuits and systems. II, Express briefs Express briefs, 2012-03, Vol.59 (3), p.143-147
Main Authors: Choi, Kwang-Chun, Lee, Seung-Woo, Lee, Bhum-Cheol, Choi, Woo-Young
Format: Article
Language:English
Subjects:
Circuits
Clocks
CMOS
CMOS integrated circuits
Consumption
Converters
Counter
Delay
Dynamic range
Error correction
Multiphase
multiphase clock
Oscillators
Radiation detectors
Sampling
sampling error correction
Synchronization
time-to-digital converter (TDC)
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Summary:A new type of sampling error corrector for a time- to-digital converter (TDC) having a multiphase reference clock and a binary counter is demonstrated. With this corrector, sampling errors caused by asynchronous TDC inputs are corrected without requiring additional counters or reclocking circuits. A TDC having the corrector is implemented in 90-nm CMOS logic technology. It has 13.6-ps/least significant bit resolution and 13-bit input dynamic range. It consumes 18 mW from a 1.2-V supply and occupies a 100 × 210 μm 2 chip area.
ISSN:1549-7747
1558-3791
DOI:10.1109/TCSII.2012.2184370