A 0.12-0.4 V, Versatile 3-Transistor CMOS Voltage Reference for Ultra-Low Power Systems

• Published in: IEEE transactions on circuits and systems. I, Regular papers Regular papers, 2018-11, Vol.65 (11), p.3790-3799
• Main Authors: de Oliveira, Arthur Campos, Cordova, David, Klimach, Hamilton, Bampi, Sergio
• Format: Article
• Language: English
• Subjects: 3 transistor; Circuit design; CMOS; Low-power electronics; MOSFET; MOSFETs; Oscillators; Semiconductor devices; Subthreshold; Temperature measurement; Threshold voltage; Transistors; ultra low power; ultra low voltage; voltage reference
• ISSN: 1549-8328; 1558-0806
• DOI: 10.1109/TCSI.2018.2859341

In this paper, we propose an ultra-low power compact 3-transistor voltage reference capable of operating at ultra-low supply voltages. The proposed circuit is based on the self-cascode MOSFET (SCM), which provides a reference voltage proportional to the threshold voltage ( V_{T} ) difference of the two NMOS transistors that compose it. Reverse short-channel and narrow-width effects are explored to obtain such V_{T} difference while using the same type of transistor. Ultra-low power operation and low line sensitivity is achieved by biasing the SCM with a zero- V_{T} (native) transistor, also leading to an area efficient design. To show its versatility, three versions of the proposed circuit were fabricated in a standard 0.13- \mu \text{m} CMOS process. Measurement performed over five samples showed an average temperature coefficient of 150-1500 ppm/°C. Minimum supply voltages of 0.12-0.4 V was observed while providing reference voltages around tens of mV. The proposed circuits consume 0.33-50 pW at room temperature and minimum supply voltage. The occupied area for any version is less than 0.0012 mm 2 .