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A study of stress-induced p/sup +//n salicided junction leakage failure and optimized process conditions for sub-0.15-μm CMOS technology
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Published in: | IEEE transactions on electron devices 2002-11, Vol.49 (11), p.1985-1992 |
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Main Authors: | , , , , , , , |
Format: | Article |
Language: | English |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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ISSN: | 0018-9383 |
DOI: | 10.1109/TED.2002.804704 |