Enhancement of Drain Current in Planar MOSFETs by Dopant Profile Engineering Using Nonmelt Laser Spike Annealing

• Published in: IEEE transactions on electron devices 2007-11, Vol.54 (11), p.2953-2959
• Main Authors: Shima, A., Mine, T., Torii, K., Hiraiwa, A.
• Format: Article
• Language: English
• Subjects: Annealing; Applied sciences; CMOS integrated circuits; Compound structure devices; Design. Technologies. Operation analysis. Testing; Devices; Dopants; Doping profiles; Drains; Electronics; Exact sciences and technology; Germanium; Halos; Implantation; Integrated circuits; Junctions; laser annealing; Lasers; Logic gates; MOSFETs; Performance evaluation; Rapid thermal annealing; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Semiconductors; source/drain (S/D) extensions (SDEs); strained silicon; Transistors; very-large-scale integration (VLSI)
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/TED.2007.906972

We investigated the effect of dopant profile engineering in planar MOSFETs, in which activation annealing was done using only nonmelt laser spike annealing (LSA). Device performance was 10% and 20% better compared to that when conventional LSA and rapid thermal annealing (RTA) are used, respectively. We achieved this by reengineering the following: 1) angle implantation in the extension of an nFET; 2) germanium preamorphization implantation in the extension of a pFET; 3) halo implantation with lower energy and smaller tilt angle; 4) deep source/drain by two-step implantation, and 5) counter implantation adjusted to the halo conditions. Hot carrier degradation was also reduced to an RTA-comparable level by halo profile engineering. Thus, we show that a submillisecond LSA is a promising technique for the fabrication of ultrashallow junctions for the 45-nm technology node and beyond and that a dopant profile engineering taking into account the minimal diffusion length of LSA is required to bring out the best device performance.