Generic Carrier-Based Core Model for Undoped Four-Terminal Double-Gate MOSFETs Valid for Symmetric, Asymmetric, and Independent-Gate-Operation Modes

A generic carrier-based core model for undoped four-terminal double-gate (DG) MOSFETs has been developed and is presented in this paper. The model is valid for symmetric, asymmetric, and independent-gate-operation modes. Based on the exact solution of the 1-D Poisson's equation in a general DG...

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Bibliographic Details
Published in:IEEE transactions on electron devices 2008-03, Vol.55 (3), p.816-826
Main Authors: Liu, Feng, He, Jin, Fu, Yue, Hu, Jinhua, Bian, Wei, Song, Yan, Zhang, Xing, Chan, Mansun
Format: Article
Language:English
Subjects:
Applied sciences
Asymmetry
Carriear-based model
Carriers
Channels
circuit simulation and design
compact modeling
Derivation
double-gate (DG) MOSFET
Electric potential
Electric, optical and optoelectronic circuits
Electronics
Equations
Exact sciences and technology
Integrated circuit modeling
Mathematical analysis
Mathematical model
Mathematical models
MOSFETs
nonclassical device
Numerical models
Poisson equation
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Silicon
Theoretical study. Circuits analysis and design
Transistors
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Summary:A generic carrier-based core model for undoped four-terminal double-gate (DG) MOSFETs has been developed and is presented in this paper. The model is valid for symmetric, asymmetric, and independent-gate-operation modes. Based on the exact solution of the 1-D Poisson's equation in a general DG MOSFET configuration, a rigorous derivation of the drain-current equations from the Pao-Sah's double integral has been performed. By using the channel carriers as the intermediate variable, a very compact analytical drain-current expression can be obtained. The model is extensively verified by comparisons with a 2-D numerical simulator under a large number of biasing conditions. The concise mathematical formulation allows the unification of various DG models into a carrier-based core model for a compact DG MOSFET model development.
ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2007.914836