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Generic Carrier-Based Core Model for Undoped Four-Terminal Double-Gate MOSFETs Valid for Symmetric, Asymmetric, and Independent-Gate-Operation Modes
A generic carrier-based core model for undoped four-terminal double-gate (DG) MOSFETs has been developed and is presented in this paper. The model is valid for symmetric, asymmetric, and independent-gate-operation modes. Based on the exact solution of the 1-D Poisson's equation in a general DG...
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Published in: | IEEE transactions on electron devices 2008-03, Vol.55 (3), p.816-826 |
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creator | Liu, Feng He, Jin Fu, Yue Hu, Jinhua Bian, Wei Song, Yan Zhang, Xing Chan, Mansun |
description | A generic carrier-based core model for undoped four-terminal double-gate (DG) MOSFETs has been developed and is presented in this paper. The model is valid for symmetric, asymmetric, and independent-gate-operation modes. Based on the exact solution of the 1-D Poisson's equation in a general DG MOSFET configuration, a rigorous derivation of the drain-current equations from the Pao-Sah's double integral has been performed. By using the channel carriers as the intermediate variable, a very compact analytical drain-current expression can be obtained. The model is extensively verified by comparisons with a 2-D numerical simulator under a large number of biasing conditions. The concise mathematical formulation allows the unification of various DG models into a carrier-based core model for a compact DG MOSFET model development. |
doi_str_mv | 10.1109/TED.2007.914836 |
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The model is valid for symmetric, asymmetric, and independent-gate-operation modes. Based on the exact solution of the 1-D Poisson's equation in a general DG MOSFET configuration, a rigorous derivation of the drain-current equations from the Pao-Sah's double integral has been performed. By using the channel carriers as the intermediate variable, a very compact analytical drain-current expression can be obtained. The model is extensively verified by comparisons with a 2-D numerical simulator under a large number of biasing conditions. The concise mathematical formulation allows the unification of various DG models into a carrier-based core model for a compact DG MOSFET model development.</description><identifier>ISSN: 0018-9383</identifier><identifier>EISSN: 1557-9646</identifier><identifier>DOI: 10.1109/TED.2007.914836</identifier><identifier>CODEN: IETDAI</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Applied sciences ; Asymmetry ; Carriear-based model ; Carriers ; Channels ; circuit simulation and design ; compact modeling ; Derivation ; double-gate (DG) MOSFET ; Electric potential ; Electric, optical and optoelectronic circuits ; Electronics ; Equations ; Exact sciences and technology ; Integrated circuit modeling ; Mathematical analysis ; Mathematical model ; Mathematical models ; MOSFETs ; nonclassical device ; Numerical models ; Poisson equation ; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices ; Silicon ; Theoretical study. Circuits analysis and design ; Transistors</subject><ispartof>IEEE transactions on electron devices, 2008-03, Vol.55 (3), p.816-826</ispartof><rights>2008 INIST-CNRS</rights><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2008</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c413t-1096c2aefc7673b25044f7a821c503155894d124b9c757334244a4c13e27000a3</citedby><cites>FETCH-LOGICAL-c413t-1096c2aefc7673b25044f7a821c503155894d124b9c757334244a4c13e27000a3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/4455786$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,27924,27925,54796</link.rule.ids><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=20118991$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>Liu, Feng</creatorcontrib><creatorcontrib>He, Jin</creatorcontrib><creatorcontrib>Fu, Yue</creatorcontrib><creatorcontrib>Hu, Jinhua</creatorcontrib><creatorcontrib>Bian, Wei</creatorcontrib><creatorcontrib>Song, Yan</creatorcontrib><creatorcontrib>Zhang, Xing</creatorcontrib><creatorcontrib>Chan, Mansun</creatorcontrib><title>Generic Carrier-Based Core Model for Undoped Four-Terminal Double-Gate MOSFETs Valid for Symmetric, Asymmetric, and Independent-Gate-Operation Modes</title><title>IEEE transactions on electron devices</title><addtitle>TED</addtitle><description>A generic carrier-based core model for undoped four-terminal double-gate (DG) MOSFETs has been developed and is presented in this paper. The model is valid for symmetric, asymmetric, and independent-gate-operation modes. Based on the exact solution of the 1-D Poisson's equation in a general DG MOSFET configuration, a rigorous derivation of the drain-current equations from the Pao-Sah's double integral has been performed. By using the channel carriers as the intermediate variable, a very compact analytical drain-current expression can be obtained. The model is extensively verified by comparisons with a 2-D numerical simulator under a large number of biasing conditions. The concise mathematical formulation allows the unification of various DG models into a carrier-based core model for a compact DG MOSFET model development.</description><subject>Applied sciences</subject><subject>Asymmetry</subject><subject>Carriear-based model</subject><subject>Carriers</subject><subject>Channels</subject><subject>circuit simulation and design</subject><subject>compact modeling</subject><subject>Derivation</subject><subject>double-gate (DG) MOSFET</subject><subject>Electric potential</subject><subject>Electric, optical and optoelectronic circuits</subject><subject>Electronics</subject><subject>Equations</subject><subject>Exact sciences and technology</subject><subject>Integrated circuit modeling</subject><subject>Mathematical analysis</subject><subject>Mathematical model</subject><subject>Mathematical models</subject><subject>MOSFETs</subject><subject>nonclassical device</subject><subject>Numerical models</subject><subject>Poisson equation</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>Silicon</subject><subject>Theoretical study. Circuits analysis and design</subject><subject>Transistors</subject><issn>0018-9383</issn><issn>1557-9646</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2008</creationdate><recordtype>article</recordtype><recordid>eNqFkjtvFDEUhUcIJJZATUFjIQENs_Hjjh9lskmWSEFbZEM78nruSI5m7MGeLfI_-ME4u1GQKKDx8zvHuve4qt4zumSMmtPt5cWSU6qWhoEW8kW1YE2jaiNBvqwWlDJdG6HF6-pNzvdlKwH4ovq1xoDJO7KyKXlM9bnN2JFVTEi-xw4H0sdE7kIXp3J8Ffep3mIafbADuYj73YD12s6F3dxeXW4z-WEH3x00tw_jiHOx_krO8p-1DR25Dh1OWIYwH9T1ZsJkZx_D4c38tnrV2yHju6f5pLor5qtv9c1mfb06u6kdMDHXpWrpuMXeKanEjjcUoFdWc-YaKkr12kDHOOyMU40SAjiABccEckUpteKk-nL0nVL8ucc8t6PPDofBBoz73BoqJKcNiP-SWjXUUEahkJ__SQoAJpnUBfz4F3hfulv6Wtwkb7gSihfo9Ai5FHNO2LdT8qNNDy2j7WPsbYm9fYy9PcZeFJ-ebG12duiTDc7nZxmnjGljWOE-HDmPiM_XAOXPaCl-Ax2UsvU</recordid><startdate>20080301</startdate><enddate>20080301</enddate><creator>Liu, Feng</creator><creator>He, Jin</creator><creator>Fu, Yue</creator><creator>Hu, Jinhua</creator><creator>Bian, Wei</creator><creator>Song, Yan</creator><creator>Zhang, Xing</creator><creator>Chan, Mansun</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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Microelectronics. Optoelectronics. Solid state devices</topic><topic>Silicon</topic><topic>Theoretical study. Circuits analysis and design</topic><topic>Transistors</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Liu, Feng</creatorcontrib><creatorcontrib>He, Jin</creatorcontrib><creatorcontrib>Fu, Yue</creatorcontrib><creatorcontrib>Hu, Jinhua</creatorcontrib><creatorcontrib>Bian, Wei</creatorcontrib><creatorcontrib>Song, Yan</creatorcontrib><creatorcontrib>Zhang, Xing</creatorcontrib><creatorcontrib>Chan, Mansun</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEL</collection><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><collection>Engineering Research Database</collection><jtitle>IEEE transactions on electron devices</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Liu, Feng</au><au>He, Jin</au><au>Fu, Yue</au><au>Hu, Jinhua</au><au>Bian, Wei</au><au>Song, Yan</au><au>Zhang, Xing</au><au>Chan, Mansun</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Generic Carrier-Based Core Model for Undoped Four-Terminal Double-Gate MOSFETs Valid for Symmetric, Asymmetric, and Independent-Gate-Operation Modes</atitle><jtitle>IEEE transactions on electron devices</jtitle><stitle>TED</stitle><date>2008-03-01</date><risdate>2008</risdate><volume>55</volume><issue>3</issue><spage>816</spage><epage>826</epage><pages>816-826</pages><issn>0018-9383</issn><eissn>1557-9646</eissn><coden>IETDAI</coden><abstract>A generic carrier-based core model for undoped four-terminal double-gate (DG) MOSFETs has been developed and is presented in this paper. The model is valid for symmetric, asymmetric, and independent-gate-operation modes. Based on the exact solution of the 1-D Poisson's equation in a general DG MOSFET configuration, a rigorous derivation of the drain-current equations from the Pao-Sah's double integral has been performed. By using the channel carriers as the intermediate variable, a very compact analytical drain-current expression can be obtained. The model is extensively verified by comparisons with a 2-D numerical simulator under a large number of biasing conditions. The concise mathematical formulation allows the unification of various DG models into a carrier-based core model for a compact DG MOSFET model development.</abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/TED.2007.914836</doi><tpages>11</tpages></addata></record> |
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subjects | Applied sciences Asymmetry Carriear-based model Carriers Channels circuit simulation and design compact modeling Derivation double-gate (DG) MOSFET Electric potential Electric, optical and optoelectronic circuits Electronics Equations Exact sciences and technology Integrated circuit modeling Mathematical analysis Mathematical model Mathematical models MOSFETs nonclassical device Numerical models Poisson equation Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Silicon Theoretical study. Circuits analysis and design Transistors |
title | Generic Carrier-Based Core Model for Undoped Four-Terminal Double-Gate MOSFETs Valid for Symmetric, Asymmetric, and Independent-Gate-Operation Modes |
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