Data Retention and Program/Erase Sensitivity to the Array Background Pattern in Deca-nanometer nand Flash Memories

• Published in: IEEE transactions on electron devices 2010-01, Vol.57 (1), p.321-327
• Main Authors: Compagnoni, C.M., Ghetti, A., Ghidotti, M., Spinelli, A.S., Visconti, A.
• Format: Article
• Language: English
• Subjects: Applied sciences; Arrays; Circuit properties; Design. Technologies. Operation analysis. Testing; Digital circuits; Electric potential; Electric, optical and optoelectronic circuits; Electronic circuits; Electronics; Electrostatic interference; Exact sciences and technology; Flash memories; Fowler-Nordheim tunneling; Integrated circuits; Integrated circuits by function (including memories and processors); Logic gates; Programming; semiconductor device modeling; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Stress; Transient analysis; Tunneling
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/TED.2009.2035536

This paper presents a new cell crosstalk effect in deca-nanometer nand Flash memories, making the data retention and erase transients of fresh cells dependent on the threshold-voltage level at which adjacent cells in the array are placed. In particular, a programmed cell is shown to display a larger threshold-voltage loss when its adjacent cells are in the erased than in the programmed state, with cells on the same bit line and word line having a similar impact on the acceleration of the threshold-voltage loss. The effect is explained by means of 3-D TCAD simulations, showing that a low threshold voltage for the adjacent cells increases the discharging tunneling current of the monitored cell for a fixed negative potential of its floating gate. This is due to a change of the electric field profile at the corners of the monitored cell active area when the potential of the floating gate of its neighboring cells is modified.