High-Mobility Ge p- and n-MOSFETs With 0.7-nm EOT Using \hbox/\hbox\hbox/\hbox/\hbox Gate Stacks Fabricated by Plasma Postoxidation

• Published in: IEEE transactions on electron devices 2013-03, Vol.60 (3), p.927-934
• Main Authors: Rui Zhang, Po-Chin Huang, Ju-Chin Lin, Taoka, N., Takenaka, M., Takagi, S.
• Format: Article
• Language: English
• Subjects: Aluminum oxide; Equivalent oxide thickness (EOT); germanium; Gold; Hafnium compounds; Logic gates; metal-oxide-semiconductor (MOS) field-effect transistor (MOSFET); mobility; MOS capacitors; MOSFET circuits; MOSFETs
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/TED.2013.2238942

An ultrathin equivalent oxide thickness (EOT) HfO 2 /Al 2 O 3 /Ge gate stack has been fabricated by combining the plasma postoxidation method with a 0.2-nm-thick Al 2 O 3 layer between HfO 2 and Ge for suppressing HfO 2 -GeO x intermixing, resulting in a low-interface-state-density ( D it ) GeO x /Ge metal-oxide-semiconductor (MOS) interface. The EOT of these gate stacks has been scaled down to 0.7-0.8 nm with maintaining the D it in 10 11 cm -2 ·eV -1 level. The p- and n-channel MOS field-effect transistors (MOSFETs) (p- and n-MOSFETs) using this gate stack have been fabricated on (100) Ge substrates and exhibit high hole and electron mobilities. It is found that the Ge p- and n-MOSFETs exhibit peak hole mobilities of 596 and 546 cm 2 /V·s and peak electron mobilities of 754 and 689 cm 2 /V·s at EOTs of 0.82 and 0.76 nm, respectively, which are the record-high reports so far for Ge MOSFETs in subnanometer EOT range because of the sufficiently passivated Ge MOS interfaces in present HfO 2 /Al 2 O 3 /GeO x /Ge gate stacks.