Statistical Model and Rapid Prediction of RRAM SET Speed-Disturb Dilemma

A comprehensive study of SET speed-disturb dilemma in resistive-switching random access memory (RRAM) is presented using statistically based prediction methodologies, accounting for the stochastic nature of SET. An analytical percolation model has been successful in explaining the statistical Weibul...

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Bibliographic Details
Published in:IEEE transactions on electron devices 2013-11, Vol.60 (11), p.3760-3766
Main Authors: LUO, Wun-Cheng, LIU, Jen-Chieh, LIN, Yen-Chuan, LO, Chun-Li, HUANG, Jiun-Jia, LIN, Kuan-Liang, HOU, Tuo-Hung
Format: Article
Language:English
Subjects:
Acceleration
Applied sciences
Design. Technologies. Operation analysis. Testing
Disturb
Electric breakdown
Electronics
Exact sciences and technology
Hafnium compounds
Integrated circuits
Integrated circuits by function (including memories and processors)
ramp voltage stress (RVS)
resistive-switching random access memory (RRAM)
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
SET speed
SET statistics
Stress
Testing
Voltage measurement
Weibull distribution
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Summary:A comprehensive study of SET speed-disturb dilemma in resistive-switching random access memory (RRAM) is presented using statistically based prediction methodologies, accounting for the stochastic nature of SET. An analytical percolation model has been successful in explaining the statistical Weibull distribution of SET time and SET voltage in addition to the power-law voltage-time dependence. Two prediction methodologies using constant voltage stress (CVS) and ramp voltage stress (RVS) are proposed to evaluate the SET speed-disturb properties. The RVS method reduces analysis time and cost and yields equivalent results as the CVS method. Furthermore, the RVS method is used to evaluate the device design space and the current status of RRAM technology to meet the strict requirement of the SET speed-disturb dilemma.
ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2013.2281991