Enabling Energy-Efficient Nonvolatile Computing With Negative Capacitance FET

Negative capacitance FETs (NCFETs) have attracted significant interest due to their steep-switching capability at a low voltage and the associated benefits for implementing energy-efficient Boolean logic. While most existing works aim to avoid the I D -V G hysteresis in NCFETs, this paper exploits t...

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Bibliographic Details
Published in:IEEE transactions on electron devices 2017-08, Vol.64 (8), p.3452-3458
Main Authors: Xueqing Li, Sampson, John, Khan, Asif, Kaisheng Ma, George, Sumitha, Aziz, Ahmedullah, Gupta, Sumeet Kumar, Salahuddin, Sayeef, Meng-Fan Chang, Datta, Suman, Narayanan, Vijaykrishnan
Format: Article
Language:English
Subjects:
Capacitance
Ferroelectric FET
Hysteresis
Latches
Logic gates
negative capacitance
negative capacitance FET (NCFET)
nonvolatile computing
nonvolatile D flip-flop (DFF)
Nonvolatile memory
nonvolatility
Resistance
Switches
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Summary:Negative capacitance FETs (NCFETs) have attracted significant interest due to their steep-switching capability at a low voltage and the associated benefits for implementing energy-efficient Boolean logic. While most existing works aim to avoid the I D -V G hysteresis in NCFETs, this paper exploits this hysteresis feature for logic-memory synergy and presents a custom-designed nonvolatile NCFET D flip-flop (DFF) that maintains its state during power outages. This paper also presents an NCFET fabricated for this purpose, showing
ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2017.2716338