Si-Based FET-Type Synaptic Device With Short-Term and Long-Term Plasticity Using High- \kappa Gate-Stack

• Published in: IEEE transactions on electron devices 2019-02, Vol.66 (2), p.917-923
• Main Authors: Seo, Young-Tak, Lee, Myoung-Sun, Kim, Chul-Heung, Woo, Sung Yun, Bae, Jong-Ho, Park, Byung-Gook, Lee, Jong-Ho
• Format: Article
• Language: English
• Subjects: Alumina-Silicon nitride; Aluminum oxide; Electron traps; Field effect transistors; Field-effect transistor (FET); Hafnium oxide; HfO; Logic gates; long-term plasticity (LTP); Memory devices; Mental depression; neuromorphic; paired-pulse facilitation (PPF); retention characteristic; Semiconductor devices; short-term plasticity (STP); Silicon; Silicon nitride; Si₃N; synaptic device; Tunneling
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/TED.2018.2888871

In this paper, we investigate the characteristics of short-term and long-term synaptic plasticity in a Si-based field-effect transistor-type memory device. An Al 2 O 3 /HfO 2 /Si 3 N 4 gate dielectric stack is used to realize short-term and long-term plasticity (STP/LTP). Si 3 N 4 and HfO 2 layers are designed to implement short-term and long-term memory, respectively. The mechanism of STP and LTP operation has been figured out by analyzing the device response to the potentiation and depression pulses. To investigate the STP operation, paired-pulse facilitation measurement is performed. The retention characteristic is also studied to validate the LTP property of the device. By investigating a device with an Al 2 O 3 /Si 3 N 4 stack as a control device, it is shown that the HfO 2 layer contributes to LTP in device with Al 2 O 3 /HfO 2 /Si 3 N 4 stack. Thus, it is confirmed that STP and LTP operations can be implemented simultaneously in devices with an Al 2 O 3 /HfO 2 /Si 3 N 4 stack.