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ESD Reliability Study of a-Si:H Thin-Film Transistor Technology: Physical Insights and Technological Implications
In this paper, we present the detailed physical insights into the electrostatic discharge (ESD) behavior of hydrogenated amorphous silicon (a-Si:H)-based thin-film transistor (TFT) technology. Device failure under ESD conditions is studied in detail using electrical and optical techniques. Device de...
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Published in: | IEEE transactions on electron devices 2019-06, Vol.66 (6), p.2624-2630 |
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Main Authors: | , , , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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Summary: | In this paper, we present the detailed physical insights into the electrostatic discharge (ESD) behavior of hydrogenated amorphous silicon (a-Si:H)-based thin-film transistor (TFT) technology. Device failure under ESD conditions is studied in detail using electrical and optical techniques. Device degradation under ESD timescales is studied using real-time capacitance-voltage and a spatially variant degradation behavior is reported. Variations in material properties are studied before and after device failure using Raman spectroscopy. Device dimension-dependent failure mechanism is explored. Impact of stressing conditions and presence of top passivation on failure behavior is also explored. Failure physics of technologically relevant device architectures including diode-connected transistors (gated diodes) and drain underlap TFTs and their increased ESD robustness is discussed. Finally, ESD behavior of a-Si:H-based TFTs is discussed. |
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ISSN: | 0018-9383 1557-9646 |
DOI: | 10.1109/TED.2019.2913040 |