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The Relationship Between Resistive Protective Oxide (RPO) and Hot Carrier Stress (HCS) Degradation in n-Channel LD SOI MOSFET

This article investigates the influence of resistive protective oxide (RPO) layer density and hot carrier stress (HCS) degradation in n-channel lateral diffused silicon-on-insulator metal-oxide-semiconductor field-effect transistors. At the beginning of HCS at a higher gate voltage ( {V}_{G} ), the...

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Bibliographic Details
Published in:IEEE transactions on electron devices 2021-03, Vol.68 (3), p.962-967
Main Authors: Lin, Yu-Shan, Chen, Li-Hui, Chang, Ting-Chang, Liu, Kuan-Ju, Lin, Chien-Yu, Ciou, Fong-Min
Format: Article
Language:English
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Summary:This article investigates the influence of resistive protective oxide (RPO) layer density and hot carrier stress (HCS) degradation in n-channel lateral diffused silicon-on-insulator metal-oxide-semiconductor field-effect transistors. At the beginning of HCS at a higher gate voltage ( {V}_{G} ), the threshold voltage shifts and subthreshold swing increase, but the ON-state current will still increase abnormally. The drain current and drain voltage ( {I}_{D} - {V}_{D} ) transfer curves indicate that channel resistance or drift region resistance dominates degradation between low- {V}_{G} and high- {V}_{G} respectively. It also found different degradation behavior by extracting the resistances at low- {V}_{G} and high- {V}_{G} to stress time. In addition, technology computer-aided design (TCAD) software results show maximum impact ionization of high- {V}_{G} , in which the direction of the electric field is toward RPO, resulting in the injection of holes into RPO during HCS. Finally, the simulated drain current and gate overdrive voltage curves for numerous interface states and numerous oxide traps show that the abnormal {I}_{ \mathrm{\scriptscriptstyle ON}} enhancement is due to the hole trapping in the RPO and the degradation is closely related to the different density of RPO. In this article, we determine the mechanism of HCS degradation and propose methods to optimize high-voltage (HV) device performance and reliability.
ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2021.3050425