Low Subthreshold Swing and High Performance of Ultrathin PEALD InGaZnO Thin-Film Transistors

• Published in: IEEE transactions on electron devices 2021-04, Vol.68 (4), p.1670-1675
• Main Authors: Jeong, Seok-Goo, Jeong, Hyun-Jun, Park, Jin-Seong
• Format: Article
• Language: English
• Subjects: Accumulation thickness; amorphous oxide thin-film transistor (TFTs); Atomic layer epitaxy; Carrier density; Electron mobility; Gallium; Hall effect; Indium gallium zinc oxide; indium gallium zinc oxide (IGZO); Indium tin oxide; interface scattering; Performance evaluation; plasma-enhanced atomic layer deposition (PEALD); Reliability analysis; Semiconductor device measurement; Semiconductor devices; Stress; Thermal stress; Thickness; Thickness measurement; Thin film transistors; Threshold voltage; Transistors; Transmission line measurements; Zinc oxide
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/TED.2021.3062321

Amorphous indium gallium zinc oxide (IGZO) thin-film transistors (TFTs) were fabricated by plasma-enhanced atomic layer deposition (PEALD). The thicknesses of the IGZO thin films varied between 3 and 7.5 nm. The device parameters were optimized at 5 nm, at threshold voltage of −0.07 V, effective mobility of 34.16 cm 2 /Vs, and subthreshold slope of 75 mV/decade and did not further improve with increasing thickness. To understand the origin of the saturated device properties, the accumulation thickness of TFTs was measured and calculated to be 6.4 nm. In addition, to investigate the origin of degraded properties of 3 nm IGZO TFTs, the Hall effect, interface trap density ( {D}_{it} ), and series resistance were measured. The carrier concentrations were nearly constant regardless of the channel thickness, but the resistivity and Hall mobility were degraded considerably in the 3 nm IGZO. In addition, the {D}_{it} and series resistance in the 3 nm TFT were 1.49 \,\times \, 10^{12} /eVcm 2 and 143.9~\Omega cm, respectively, which are relatively higher than those of the other TFTs. Finally, the device reliability of IGZO TFTs under bias thermal stress was assessed. The threshold voltage shift was less than 1 V under 125 °C and 1.5 MV/cm stress conditions.