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Reliability of p-Type Pi-Gate Poly-Si Nanowire Channel Junctionless Accumulation-Mode FETs
In this study, p-type Pi-gate (PG) poly-Si nanowire channel junctionless accumulation-mode (JAM) field-effect transistors (FETs) were successfully fabricated and their reliability was investigated. The reliability of these PG JAM FETs was found to be dependent on the effective channel doping concent...
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Published in: | IEEE transactions on electron devices 2021-06, Vol.68 (6), p.2647-2652 |
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Main Authors: | , , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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Summary: | In this study, p-type Pi-gate (PG) poly-Si nanowire channel junctionless accumulation-mode (JAM) field-effect transistors (FETs) were successfully fabricated and their reliability was investigated. The reliability of these PG JAM FETs was found to be dependent on the effective channel doping concentration ( {N}_{\text {ch,eff}} ). Through a negative gate bias stress (NGBS) test, we found that degradation in the average subthreshold swing (A.S.S.) and shift in the threshold voltage ( {V}_{\text {TH}} ) increases as the {N}_{\text {ch,eff}} of the PG JAM FETs decreases. Furthermore, the PG JAM FETs with a lower {N}_{\text {ch,eff}} show the more severe rate of deterioration in the transconductance ( {G}_{\text {m}} ) and ON current ( {I}_{\text {ON}} ). By increasing {N}_{\text {ch,eff}} to reduce the electric field ( {E} -field) on the gate oxide and tune the carrier transport mechanism in the poly-Si nanowire channel, a better immunity against the NGBS test in the p-type PG JAM FETs can be achieved under a gate overdrive voltage ( {V}_{\text {GOD}} = {V}_{G} - {V}_{\text {TH},\text {initial}} = -{3.5} V) to perform the NGBS test. |
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ISSN: | 0018-9383 1557-9646 |
DOI: | 10.1109/TED.2021.3075665 |