Improvement in Short-Channel Effects of the Thin-Film Transistors Using Atomic-Layer Deposited In-Ga-Sn-O Channels With Various Channel Compositions

• Published in: IEEE transactions on electron devices 2022-10, Vol.69 (10), p.5542-5548
• Main Authors: Noh, Shin-Ho, Kim, Hyo-Eun, Yang, Jong-Heon, Kim, Yong-Hae, Kwon, Young-Ha, Seong, Nak-Jin, Hwang, Chi-Sun, Choi, Kyu-Jeong, Yoon, Sung-Min
• Format: Article
• Language: English
• Subjects: Atomic layer deposition; Atomic-layer deposition (ALD); Channel estimation; Composition; Contact resistance; Electrodes; In–Ga–Sn–O (IGTO); Logic gates; Performance evaluation; Semiconductor devices; short-channel effect (SCE); Stress; Thin film transistors; thin-film transistor (TFT); Threshold voltage
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/TED.2022.3198032

In-Ga-Sn-O (IGTO) thin-film transistors (TFTs) were fabricated with channel lengths from 3 \mu \text{m} to 500 nm to investigate the short-channel effects (SCEs), in which IGTO channel compositions were modulated during the atomic-layer deposition. The SCEs appearing in the IGTO TFTs were found to be manifested by increasing the In/Ga ratio of IGTO channel, showing typical channel composition dependence. Alternatively, small values of the channel-length reduction and contact resistance could be obtained to be 50 nm and 0.52 \text{k}\Omega , respectively, for the device using the IGTO channel with an In/Ga ratio of 1.7. Threshold voltage shifts of the IGTO TFT were estimated to be only +0.03 and +1.22 V under negative and positive gate-bias stress for 104 s, respectively, even with a channel length as short as 1 \mu \text{m} .