Experiences in Digital Circuit Design Courses: A Self-Study Platform for Learning Support

• Published in: IEEE transactions on learning technologies 2014-10, Vol.7 (4), p.360-374
• Main Authors: Bañeres, David, Clariso, Robert, Jorba, Josep, Serra, Montse
• Format: Article
• Language: English
• Subjects: Academic Achievement; aprenentatge virtual; automatic assessment; Automation; avaluació automàtica; Bachelors Degrees; Basic Skills; Circuit synthesis; Circuits; comprovació de models; Computational modeling; Computer Assisted Testing; Computer engineering; Computer programs; Computer Science Education; Computer Simulation; control de modelo; Course Content; Courseware; Curriculum Design; Design; digital circuit design; Digital circuits; diseño de circuito digital; disseny de circuits digitals; e-learning; Electronic Learning; Electronics; Ensenyament virtual; Enseñanza virtual; evaluación automática; Feedback; Feedback (Response); Foreign Countries; formal verification; Integrated circuit modeling; Learning; Learning Processes; Learning Strategies; Logic gates; model checking; Platforms; Program Validation; Skill Analysis; Skills; Student Attitudes; Student Surveys; Students; Synthesis; Validity; verificació formal; verificación formal; Web-based instruction
• ISSN: 1939-1382; 1939-1382; 2372-0050
• DOI: 10.1109/TLT.2014.2320919

The synthesis of digital circuits is a basic skill in all the bachelor programmes around the ICT area of knowledge, such as Computer Science, Telecommunication Engineering or Electrical Engineering. An important hindrance in the learning process of this skill is that the existing educational tools for the design of circuits do not allow the student to validate if his design satisfies the specification. Furthermore, an automatic feedback is essential in order to help students to fix incorrect designs. In this paper, we propose an online platform where the students can design and verify their circuits with an individual and automatic feedback. The technical aspects of the platform and the designed verification tool are presented. The impact of the platform on the learning process of the students is illustrated by analyzing the student performance on the course where the platform has been used. Results on the utilization of the platform versus the success rate and marks in the final exam are presented and compared with previous semesters.