68 kbit capacity 16 µm-period magnetic bubble memory chip design with 2 µm minimum features

• Published in: IEEE transactions on magnetics 1976-11, Vol.12 (6), p.614-617
• Main Authors: Bonyhard, P., Smith, J.
• Format: Article
• Language: English
• Subjects: Bars; Chip scale packaging; Detectors; Magnetosphere; Probability; Radio access networks; Semiconductor device measurement; Strips; Tail; Testing
• ISSN: 0018-9464; 1941-0069
• DOI: 10.1109/TMAG.1976.1059241

A bubble propagating structure that operates well on a 14 μm to 18 μm propagate period with a nominal 2 μm minimum feature size has been designed. The structure consists of only 1 discrete permalloy feature per circuit period. Sixty-eight kbit-capacity memory chips based on such structures have been designed, built, characterized, packaged and the packages have been characterized. The chip is organized as a set of minor (storage) loops with separate write and read major lines. The bubble manipulating functions, of which the replicate and transfer gates are the most critical, have also been designed with 2 μm minimum features. The design is adequate to provide a 14 Oe bias field margin range with drive fields of about 35 Oe, using a bubble garnet material with approximately 170 Oe free bubble collapse field. Sixty-eight kbit single loop shift register type chips designed using similar propagating structures, however, provide over 20 Oe bias field margin ranges with drive fields of about 35 Oe.