An FBAR/CMOS Frequency/Phase Discriminator and Phase Noise Reduction System

A phase noise reduction scheme using a sensitive resonator-based low-noise phase-frequency discriminator is presented in this paper. The discriminator uses a high quality factor thin film bulk acoustic resonator in a notch filter configuration with common-mode traps to reduce the low-frequency noise...

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Bibliographic Details
Published in:IEEE transactions on microwave theory and techniques 2015-05, Vol.63 (5), p.1658-1665
Main Authors: Imani, Alireza, Hashemi, Hossein
Format: Article
Language:English
Subjects:
Bulk acoustic wave
CMOS
Digital broadcasting
Discriminators
Feedback
frequency locking
Frequency modulation
Locks
Mixers
Noise
Noise measurement
Noise reduction
oscillator
Phase noise
phase noise reduction
Receivers & amplifiers
Reduction
Resonant frequency
Upconversion
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Summary:A phase noise reduction scheme using a sensitive resonator-based low-noise phase-frequency discriminator is presented in this paper. The discriminator uses a high quality factor thin film bulk acoustic resonator in a notch filter configuration with common-mode traps to reduce the low-frequency noise up-conversion. The phase noise reduction scheme comprises of a main feedback loop to lock a voltage-controlled oscillator to the discriminator and another loop to adjust the depth of the notch. Two chips were fabricated in 0.13- μm CMOS technology integrating the discriminator and the phase noise reduction schemes, respectively. The 1.5-GHz discriminator shows phase noise floor of -128 dBc/Hz at 20 kHz, -142 dBc/Hz at 100 kHz, -162 dBc/Hz at 1 MHz, and -166 dBc/Hz at 4 MHz, while consuming 26 mW of power. The measured phase noise of the feedback reduction circuitry reaches the phase noise floor of the discriminator within the loop bandwidth, as expected.
ISSN:0018-9480
1557-9670
DOI:10.1109/TMTT.2015.2416239