Non-quasi-static small-signal modeling and analytical parameter extraction of SOI FinFETs

• Published in: IEEE transactions on nanotechnology 2006-05, Vol.5 (3), p.205-210
• Main Authors: IN MAN KANG, SHIN, Hyungcheol
• Format: Article
• Language: English
• Subjects: Analytical models; Applied sciences; Capacitance; Circuit simulation; CMOS RF modeling; Data mining; Design. Technologies. Operation analysis. Testing; Drains; Electronics; Equivalent circuits; Exact sciences and technology; Extraction; FinFETs; Integrated circuit modeling; Integrated circuits; Mathematical analysis; Mathematical models; MOSFETs; Optimization; Parameter extraction; Performance analysis; Saturation; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; small-signal model; SOI FinFET; Transistors
• ISSN: 1536-125X; 1941-0085
• DOI: 10.1109/TNANO.2006.869946

Accurate modeling and analytical parameter extraction of the non-quasi-static small-signal model of FinFETs are presented using a three-dimensional device simulator. Using simple Y- and Z-matrices calculations, the extrinsic gate-to-drain/source capacitance and source/drain resistance are de-embedded from the small-signal equivalent circuit. The analytical parameter extractions are performed by Y-parameter analysis after removing the extrinsic gate-to-drain/source capacitance and source/drain resistance. Accuracy of the model and extraction method is verified with the device-simulation data up to 700 GHz. Without any complex fitting and optimization steps, the total modeling rms error of the Y-parameter up to 700 GHz was calculated to be only 1.9 % in the saturation region and 2.1 % in the linear region. Also, the bias dependencies of the small-signal parameters are presented.